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dg2034e www.vishay.com vishay siliconix s17-0388-rev. a, 20-mar-17 1 document number: 73172 for technical questions, contact: powerictechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 power down fault protected, 1.8 v to 5.5 v, 2.5 ? , 4-channel (4:1) multiplexer description the dg2034e is a four-channel multiplexer that operates with a single 1.8 v to 5.5 v power supply. it features power down fault protection that prevents excessive current flow when v+ is to ground. the devices low power dissipa tion and wide voltage range make it ideal for use in batte ry powered products. the ultra low capacitance and charge injection of the switch make it an ideal solution for data acquisition and sample and hold applications, where low glitch and fast settling are required. low switch resistance and fast switching speeds, together with high signal bandwidth, make the dg2034e suitable for video signal switching. the dg2034e switches one of four inputs to a common output as determined by the 3-bit binary address lines: a0, a1, and en. each switch conducts equally well in both directions when on, blocks input voltages up to the supply level when off, and exhibits break before make switching action. the devices high esd and la tch-up current capability make it more reliable in designs wh ere the part sits close to the interface. the dg2034e is available in msop10 and qfn12 3 mm x 3 mm packages. features ?2.5 ? switch on-resistance ? 7 pf source-off capacitance ? 27 pf comm-off capacitance ? 33 pf comm-on capacitance ? 13 ns turn-on time ? -2 pc charge injection ? -67 db off-isolation at 1 mhz ? -71 db crosstalk at 1 mhz ? 166 mhz bandwidth ?8 kv esd / hbm ? 400 ma latch-up current benefits ? power down fault protection ? low parasitic and charge injection ? wide operation voltage range ? high esd tolerance applications ? automatic test equipment ? process control and automation ? data acquisition systems ? meters and instruments ? medical and healthcare systems ? communication systems ? audio and video switching ? relay replacements ? ? functional block diagram and pin configuration logic gnd com s3 s4 s1 s2 1 2 3 9 8 7 456 12 11 10 en nc v+ to p v i ew 12-pin qfn (3 mm x 3 mm) a0 nc a1 a1 s2 com 1 2 3 10 9 top view a0 s1 gnd 8 msop-10 s4 v+ 4 5 7 s3 en 6 logic
dg2034e www.vishay.com vishay siliconix s17-0388-rev. a, 20-mar-17 2 document number: 73172 for technical questions, contact: powerictechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. signals on s x , com, en or a x exceeding v+ or v- will be clamped by internal diodes. limi t forward diode current to maximum current ratings b. all leads welded or soldered to pc board c. derate 16.2 mv/c above 70 c d. derate 4 mv/c above 70 c truth table a1 a0 en on switch xx0none 001s1 011s2 101s3 111s4 ordering information temp. range package part number -40 c to +85 c msop-10 DG2034EDQ-T1-GE3 12-pin qfn (3 mm x 3 mm) dg2034edn-t1-ge4 absolute maximum ratings parameter limit unit referenced v+ to gnd -0.3 to +6 v a x , en, s x , com a -0.3 to (v+ + 0.3) continuous current (any terminal) 50 ma peak current (pulsed at 1 ms, 10 % duty cycle) 100 power dissipati on (package) b qfn-12 (3 mm x 3 mm) c 1295 mw msop-10 d 320 storage temperature (d suffix) -65 to +150 c esd / hbm eia / jesd22-a114-a 8k v esd / cdm eia / jesd22-c101-a 2k latch up jesd78 400 ma
dg2034e www.vishay.com vishay siliconix s17-0388-rev. a, 20-mar-17 3 document number: 73172 for technical questions, contact: powerictechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. room = 25 c, full = as determined by the operating suffix b. typical values are for design aid only, not guaranteed nor subject to production testing c. the algebraic convention whereby the most negative value is a mi nimum and the most positive a ma ximum, is used in this datash eet d. guarantee by design, not su bjected to pr oduction test e. v a , en = input voltage to perform proper function f. difference of min. and max. values g. guaranteed by 5 v testing specifications (v+ = 3 v) parameter symbol test conditions otherwise unless specified v+ = 3 v, 10 %, v al = 0.5 v, v ah = 1.5 v e temp. a limits -40 to +85 c unit min. c typ. b max. c analog switch analog signal range d v analog full 0 - v+ v drain-source ? on-resistance r ds(on) v+ = 1.8 v, v s = 0.4 v / v+, i s = 8 ma room - 7 10 ? full - - 11 v+ = 2.7 v, v com = 0.8 v / 1.8 v i com = 10 ma room - 4.6 5.3 full - - 5.9 on-resistance matching ? r ds(on) v+ = 2.7 v, v com = 0.8 v / 1.4 v / 1.8 v i com = 10 ma room - 0.02 0.27 full - - 0.41 on-resistance flatness d, f r flat(on) room - 0.62 1 full - - 1.3 off leakage current g i s(off) v+ = 3.3 v, v s = 1 v / 3 v v com = 3 v / 1 v, v en = 0 v room -2 0.01 2 na full -5 - 5 com off leakage current g i com(off) room -2 0.01 2 full -5 - 5 channel-on leakage current g i com(on) v+ = 3.3 v v com = v s = 1 v / 3 v room -2 0.01 2 full -5 - 5 digital control input current d i a or i en v a/en = 0 v or v+, see truth table full -1 0.05 1 a input high voltage d v ah or v enh full 1.5 1.25 - v input low voltage d v al or v enl full - 1 0.5 digital input capacitance d c in room - 3 - pf dynamic characteristics turn-on time t on v s = 1.5 v, c l = 35 pf, r l = 300 ? room - 19 29 ns full - - 39 turn-off time t off room - 16 26 full - - 36 break-before-make time d t bbm room 7 12 - full 5 - - transition time t trans v s = 1.5 v / 0 v, v s = 0 v / 1.5 v, r l = 300 ? room - 26 41 full - - 51 charge injection d q inj c l = 1 nf, v gen = 1.5 v, r gen = 0 ? room - -2 - pc bandwidth d bw c l = 5 pf (set up capacitance) room - 166 - mhz off-isolation d oirr r l = 50 ? , c l = 5 pf f = 1 mhz room - -67 - db f = 10 mhz room - -52 - channel-to-cha nnel crosstalk d x talk r l = 50 ? , c l = 5 pf f = 1 mhz room - -71 - f = 10 mhz room - -55 - off capacitance d c s(off) v+ = 2.7 v, f = 1 mhz room - 7 - pf com off capacitance d c com(off) room - 27 - com on capacitance d c com(on) room - 33 - power supply power supply range v+ full 2.7 - 3.3 v power supply current d i+ v+ = 2.7 v, v a/en = 0 v or 2.7 v, see truth table full - - 1 a
dg2034e www.vishay.com vishay siliconix s17-0388-rev. a, 20-mar-17 4 document number: 73172 for technical questions, contact: powerictechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. room = 25 c, full = as determined by the operating suffix b. typical values are for design aid only, not guaranteed nor subject to production testing c. the algebraic convention whereby the most negative value is a mi nimum and the most positive a ma ximum, is used in this datash eet d. guarantee by design, not su bjected to pr oduction test e. v a , en = input voltage to perform proper function f. difference of min. and max. values g. guaranteed by 5 v testing stresses beyond those listed under absolute maximum ratings ma y cause permanent damage to th e device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those in dicated in the operational sectio ns of the specifications is not implied. exposure to absolute maximum rating conditions for extended pe riods may affect device reliability. specifications (v+ = 5 v) parameter symbol test conditions otherwise unless specified v+ = 5 v, 10 %, v al = 0.5 v, v ah = 2 v e temp. a limits -40 to +85 c unit min. c typ. b max. c analog switch analog signal range d v analog full 0 - v+ v drain-source ? on-resistance r ds(on) v+ = 4.5 v, v com = 0.8 v / 3.5 v i com = 10 ma room - 2.5 3.1 ? full - - 4 on-resistance matching ? r ds(on) v+ = 4.5 v, v com = 0.8 v / 2.5 v / 3.5 v i com = 10 ma room - 0.02 0.29 full - - 0.42 on-resistance flatness d, f r flat(on) room - 0.6 0.9 full - - 1.2 off leakage current g i s(off) v+ = 5.5 v, v s = 1 v / 4.5 v v com = 4.5 v / 1 v, v en = 0 v room -2 0.17 2 na full -8 - 8 com off leakage current g i com(off) room -5 0.77 5 full -15 - 15 channel-on leakage current g i com(on) v+ = 5.5 v, v com = v s = 1 v / 4.5 v room -5 0.61 5 full -15 - 15 power down leakage d i pd v+ = 0 v, v d = 5.5 v, s x open full - 0.01 5 a v+ = 0 v, v s = 5.5 v, com, open full - 0.01 5 digital control input current d i a or i en v a/en = 0 v or v+, see truth table full - 0.01 1 a input high voltage d v ah or v enh full 2 1.76 - v input low voltage d v al or v enl full - 1.3 0.5 digital input capacitance d c in room - 3 - pf dynamic characteristics turn-on time t on v s = 3 v, c l = 35 pf, r l = 300 ? room - 13 25 ns full - - 35 turn-off time t off room - 12 20 full - - 30 break-before-make time d t bbm room 4 10 - full 3 - - transition time t trans v s = 3 v / 0 v, v s = 0 v / 3 v, r l = 300 ? room - 17 32 full - - 42 propagation delay d t pd v+ = 5 v, no r load room - 537 - ps charge injection d q inj c l = 1 nf, v gen = 2.5 v, r gen = 0 ? room - -2.6 - pc bandwidth d bw c l = 5 pf (set up capacitance) room - 166 - mhz off-isolation d oirr r l = 50 ? , c l = 5 pf f = 1 mhz room - -67 - db f = 10 mhz room - -52 - channel-to-cha nnel crosstalk d x talk r l = 50 ? , c l = 5 pf f = 1 mhz room - -71 - f = 10 mhz room - -55 - off capacitance d c s(off) v+ = 5 v, f = 1 mhz room - 7 - pf com off capacitance d c com(off) room - 27 - com on capacitance d c com(on) room - 36 - power supply power supply range v+ full 4.5 - 5.5 v power supply current d i+ v+ = 5.5 v, v a/en = 0 v or 5.5 v, see truth table full - - 1 a
dg2034e www.vishay.com vishay siliconix s17-0388-rev. a, 20-mar-17 5 document number: 73172 for technical questions, contact: powerictechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) on-resistance vs. analog voltage on-resistance vs. analog voltage on-resistance vs. analog voltage leakage current vs. temperature leakage current vs. temperature supply current vs. temperature 10 100 1000 10000 0 2 4 6 8 10 12 14 16 18 20 012345 axis title 1st line 2nd line 2nd line r on - on-resistance ( ) v com - analog voltage (v) 2nd line v+ = +1.8 v v+ = +2.7 v v+ = +3 v v+ = +4.5 v v+ = +5 v i s = 10 ma 10 100 1000 10000 1 2 3 4 5 6 7 0 0.5 1 1.5 2 2.5 3 axis title 1st line 2nd line 2nd line r on - on-resistance ( ) v com - analog voltage (v) 2nd line +85 c +25 c -40 c v+ = +2.7 v i s = 10 ma 10 100 1000 10000 0 1 2 3 4 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 axis title 1st line 2nd line 2nd line r on - on-resistance () v com - analog voltage (v) 2nd line +85 c +25 c -40 c v+ = +4.5 v i s = 10 ma 10 100 1000 10000 -15000 -13000 -11000 -9000 -7000 -5000 -3000 -1000 1000 -40-20 0 20406080100 axis title 1st line 2nd line 2nd line leakage current (pa) temperature (c) 2nd line i com(off) ,v com = 4.5 v, v s = 1 v i com(on) ,v com = 4.5 v i s(off) ,v com = 1 v, v s = 4.5 v i s(off) ,v com = 4.5 v, v s = 1 v i com(on) ,v com = 1 v i com(off) ,v com = 1 v, v s = 4.5 v v+ = +5.5 v 10 100 1000 10000 -800 -600 -400 -200 0 200 -40-20 0 20406080100 axis title 1st line 2nd line 2nd line leakage current (pa) temperature (c) 2nd line i com(off) ,v com = 3 v, v s = 1 v i com(on) ,v com = 3 v i s(off) ,v com = 1 v, v s = 3 v i s(off) ,v com = 3 v, v s = 1 v i com(on) ,v com = 1 v i com(off) ,v com = 1 v, v s = 3 v v+ = +3.3 v 10 100 1000 10000 0 1 2 3 4 5 6 7 8 9 10 -40-20 0 20406080100 axis title 1st line 2nd line 2nd line i+ - supply current (na) temperature (c) 2nd line v+ = +2.7 v v+ = +5.5 v v a/en = v+
dg2034e www.vishay.com vishay siliconix s17-0388-rev. a, 20-mar-17 6 document number: 73172 for technical questions, contact: powerictechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) switching time vs. temperature switching time vs. temperature switching time vs. temperature loss, oirr, x talk vs. frequency positive supply current vs. switching frequency switching threshold vs. supply voltage 10 100 1000 10000 10 12 14 16 18 20 22 24 -50-25 0 255075100 axis title 1st line 2nd line 2nd line t on(en) , t off(en) - switching time (ns) temperature (c) 2nd line v+ = +3 v, t on v+ = +3 v, t off v+ = +5 v, t on v+ = +5 v, t off 10 100 1000 10000 0 2 4 6 8 10 12 14 16 18 20 -50 -25 0 25 50 75 100 axis title 1st line 2nd line 2nd line t bbm - switching time (ns) temperature (c) 2nd line v+ = +5 v v+ = +3 v 10 100 1000 10000 0 5 10 15 20 25 30 35 40 -50 -25 0 25 50 75 100 axis title 1st line 2nd line 2nd line t trans - switching time (ns) temperature (c) 2nd line v+ = +5 v v+ = +3 v 10 100 1000 10000 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 100k 1m 10m 100m 1g axis title 1st line 2nd line 2nd line loss, oirr, x talk (db) frequency (hz) 2nd line oirr v+ = +5 v loss x talk 10 100 1000 10000 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 10 100 1000 10k 100k 1m 10m axis title 1st line 2nd line 2nd line i+ - supply current ( a) v a/en switching frequency (hz) 2nd line v+ = +5 v v+ = +2.7 v 10 100 1000 10000 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 123456 axis title 1st line 2nd line 2nd line v t - switching threshold (v) v+ - supply voltage (v) 2nd line -40 c to +85 c v ih = -40 c v il = 85 c
dg2034e www.vishay.com vishay siliconix s17-0388-rev. a, 20-mar-17 7 document number: 73172 for technical questions, contact: powerictechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) charge injection vs. source voltage positive supply current vs. logic voltage leakage current vs. analog voltage 10 100 1000 10000 -40 -30 -20 -10 0 10 20 0123456 axis title 1st line 2nd line 2nd line q inj - charge injection (pc) v s - analog voltage (v) 2nd line v+ = 5 v v+ = 3 v v+ = 1.8 v 10 100 1000 10000 0.001 0.01 0.1 1 10 100 1000 10 000 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 axis title 1st line 2nd line 2nd line i+ - supply current (a) v a/en (v) 2nd line v+ = 2.7 v v+ = 5 v -16 000 -14 000 -12 000 -10 000 -8000 -6000 -4000 -2000 0 2000 4000 0123456 leakage current (pa) v d - analog voltage (v) i s(off) i com (on) v+ = +5.5 v i com(off)
dg2034e www.vishay.com vishay siliconix s17-0388-rev. a, 20-mar-17 8 document number: 73172 for technical questions, contact: powerictechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 test circuits fig. 1 - switching time fig. 2 - break-before-make fig. 3 - transition time logic input switch output 50 % 0 v t r < 5 ns t f < 5 ns 90 % t off t on v out note: logic input waveform is inverted for switches that have the opposite logic sense control c l (includes fixture and stray capacitance) v+ in r l r l + r on v out = v in no or nc com v out gnd c l 35 pf r l 300 ? v+ v in switch input switch output v inh v inl 0.9 x v out c l (includes fixture and stray capacitance) nc v no no v nc 0 v logic input switch output v o v nc = v no t r < 5 ns t f < 5 ns 90 % t d t d in com v+ gnd v+ c l 35 pf v o r l 300 ? v inh v inl c l (includes fixture and stray capacitance) r l r l + r on v o = v s v+ in c l 35 pf r l 300 ? v o v s2 v s1 gnd +15 v 50 % logic input switch output v s1 t r < 5 ns t f < 5 ns 10 % t trans+ 90 % v 01 v s2 v 02 t trans- no or nc com nc or no v inh v inl
dg2034e www.vishay.com vishay siliconix s17-0388-rev. a, 20-mar-17 9 document number: 73172 for technical questions, contact: powerictechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 test circuits fig. 4 - charge injection fig. 5 - crosstalk fig. 6 - off isolation fig. 7 - source / drain capacitances c l 1 nf r g v o v+ com in v g gnd off on off v o ? v o in in dependent on switch configuration input polarity determined by sense of switch. v+ v in = 0 - v+ q = ? v o x c l no or nc no or nc x talk isolation = 20 log v out v in c = rf bypass com v s 0 v or 2.4 v in 50 ? r g = 50 ? v+ gnd c v+ v in nc or no v out r l 50 ? com 0 v, 2.4 v v+ r g = 50 ? gnd off isolation = 20 log v com v no/nc in no or nc c c = rf bypass no or nc in com v+ gnd 0 v, 2.4 v meter hp4192a impedance analyzer or equivalent c v+ f = 1 mhz
dg2034e www.vishay.com vishay siliconix s17-0388-rev. a, 20-mar-17 10 document number: 73172 for technical questions, contact: powerictechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 test circuits fig. 8 - source / dr ain power down leakage ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? vishay siliconix maintains worldw ide manufacturing ca pability. products may be manufactured at one of several qualified locatio ns. reliability da ta for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package / ta pe drawings, part marking, and reliability data, see www.vishay.com/ppg?73172 . + - 5.5 v a in nc, no, s x v+ v+ g nd com v+ + - 5.5 v a in nc, no, s x v+ v+ g nd com v+
notes: 1. die thickness allowable is 0.203 0.0127. 2. dimensioning and tolerances per ansi.y14.5m-1994. 3. dimensions ?d? and ?e 1 ? do not include mold flash or protrusions, and are measured at datum plane -h- , mold flash or protrusions shall not exceed 0.15 mm per side. 4. dimension is the length of terminal for soldering to a substrate. 5. terminal positions are shown for reference only. 6. formed leads shall be planar with respect to one another within 0.10 mm at seating plane. 7. the lead width dimension does not include dambar protrusion. allowable dambar protrusion shall be 0.08 mm total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the lead foot. minimum space between protrusions and an adjacent lead to be 0.14 mm. see detail ?b? and section ?c-c?. 8. section ?c-c? to be determined at 0.10 mm to 0.25 mm from the lead tip. 9. controlling dimension: millimeters. 10. this part is compliant with jedec registration mo-187, variation aa and ba. 11. datums -a- and -b- to be determined datum plane -h- . 12. exposed pad area in bottom side is the same as teh leadframe pad size. 5 n n-1 a b c 0.20 (n/2) tips) 2x n/2 2 1 0.60 0.50 0.60 e top view e see detail ?b? -h- 3 d -a- seating plane a 1 a 6 c 0.10 side view 0.25 bsc 4 l -c- seating plane 0.07 r. min 2 places parting line detail ?a? (scale: 30/1) 0.48 max detail ?b? (scale: 30/1) dambar protrusion 7 c 0.08 m b s a s b b 1 with plating base metal c 1 c section ?c-c? scale: 100/1 (see note 8) see detail ?a? a 2 0.05 s c c ? 3 e 1 -b- end view e1 0.95 package information vishay siliconix document number: 71245 12-jul-02 www.vishay.com 1 msop: 10?leads jedec part number: mo-187, (variation aa and ba) n = 10l millimeters dim min nom max note a - - 1.10 a 1 0.05 0.10 0.15 a 2 0.75 0.85 0.95 b 0.17 - 0.27 8 b 1 0.17 0.20 0.23 8 c 0.13 - 0.23 c 1 0.13 0.15 0.18 d 3.00 bsc 3 e 4.90 bsc e 1 2.90 3.00 3.10 3 e 0.50 bsc e 1 2.00 bsc l 0.40 0.55 0.70 4 n 10 5 0 4 6 ecn: t-02080?rev. c, 15-jul-02 dwg: 5867
notes: 1. all dimensions are in millimeters. 2. n is the total number of terminals. 3. dimension b applies to metallized terminal and is measured between 0.25 and 0.30 mm from terminal tip. 4. coplanarity applies to the exposed heat sink slug as well as the terminal. 5. the pin #1 identifier may be either a mold or marked feature, it must be located within the zone iindicated. 3 terminal tip d2 d2/2 4 exposed pad e2/2 e2 3 c 0.10 m a b 4xb 2 x e bottom view top view -a- -b- e d d/2 e/2 c 0.25 c 0.25 -c- c 0.08 c 0.10 // seating plane a3 a1 a 4 nx side view bb cc aa dd pin #1 identifier l e 2 x e package information vishay siliconix document number: 72209 14-apr-03 www.vishay.com 1 qfn?12 lead (3 x 3) millimeters inches dim min nom max min nom max a 0.80 0.90 1.00 0.032 0.035 0.039 b 0.18 0.23 0.30 0.007 0.009 0.012 d 3.00 bsc 0.118 bsc d2 1.00 1.15 1.25 0.039 0.045 0.049 e 3.00 bsc 0.118 bsc e2 1.00 1.15 1.25 0.039 0.045 0.049 e 0.50 bsc 0.02 bsc l 0.45 0.55 0.65 0.018 0.022 0.026 aa 0.435 0.017 bb 0.435 0.017 cc 0.18 0.007 dd 0.18 0.007 ecn: c-03092?rev. a, 14-apr-03 dwg: 5898
legal disclaimer notice www.vishay.com vishay revision: 08-feb-17 1 document number: 91000 disclaimer ? all product, product specifications and data ar e subject to change with out notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of th e products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product , (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all implied warranties, includ ing warranties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain types of applicatio ns are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular applic ation. it is the customers responsibility to validate tha t a particular product with the prope rties described in the product sp ecification is suitable for use in a particular application. parameters provided in datasheets and / or specifications may vary in different ap plications and perfor mance may vary over time. all operating parameters, including ty pical parameters, must be va lidated for each customer application by the customer s technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product could result in personal injury or death. customers using or selling vishay product s not expressly indicated for use in such applications do so at their own risk. please contact authorized vishay personnel to obtain writ ten terms and conditions rega rding products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners. ? 2017 vishay intertechnology, inc. all rights reserved

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